Radiation effect in FD-SOI nanowire FETs due to high dose rate gamma-ray under variable irradiation temperatures

Abstract

In this study, the effects of gamma-ray irradiation on fully depleted silicon on insulator (FD-SOI) Nanowire FETs (NWFETs) at different irradiation temperatures (265, 300, and 400 K) were analyzed. For PMOS, positive threshold shift (dVth) owing to interface and oxide traps could be observed regardless of the irradiation temperature. However, NMOS showed a different temperature trend. At 400 K, the oxide traps were cured during annealing, enhancing the influence of interface traps and resulting in a positive dVth. In comparison, at 265 K, the oxide traps became more influential due to reduced hole mobility in the buried oxide (BOX), resulting in a negative dVth. Annealing was performed at room temperature for 24 and 168 h to investigate the dVth owing to the annealing effect (dVth-anneal). In NMOS, a positive dVth-anneal occurred regardless of width (W) as the oxide traps were cured by annealing. PMOS showed a negative dVth-anneal regardless of W.