ScholarWorks@Gyeongsang National University: Kim, Jung Sik

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Kim, Jung Sik (김정식)

IT공과대학 (전기공학과)

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Tel 0557721718
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TCAD simulation:8||TCAD:6||Machine learning:5||3D NAND flash memory:4||DNN:4||displacement defect:4||3D NAND flash memory:3||technology computeraided design (TCAD):3||Logic gates:3||lateral migration:2||program:2||Displacement defect:2||radiation effect:2||Superjunction MOSFET:2||Numerical simulation:2||terrestrial radiation:2||retention:2||retention time:2||rowhammer:2||DRAM:2||Random access memory:2||trap profile:2||Terrestrial radiation:2||Electric potential:2||FinFET:2||data retention:2||Radiation effect:2||Gateallaround:1||Gateallaround (GAA):1||Geometrical variability:1||Germanium:1||Insulated gated bipolar transistor:1||Interface trap:1||Junctions:1||LDMOS:1||LGBM:1||Lowfrequency noise:1||MS contact:1||Machine Learning:1||Machine learning. tcad simulation:1||MachineLearning:1||NAND flash memory:1||NMOSFET:1||Nanosheet:1||Nanosheet FET:1||Nanosheet field effect transistor:1||Nanosheet fieldeffect transistor:1||Nanowire:1||Nanowire FET:1||Numerical simuation:1||Overhang saddle fin:1||Oxide traps:1||Power device:1||Programming:1||Radiation:1||Random displacement anomaly (RDA):1||Rowhammer (RH):1||SJIGBT:1||SRAM:1||Saddle fin DRAM:1||Schottky barrier height:1||Sentaurus deviceQTX:1||SentaurusQTX:1||SiC MOSFET:1||Silicon:1||Silicon Carbide:1||Simulation:1||Single trap:1||Subthreshold current:1||TCAD simulation:1||TID:1||TSCIS:1||Technology Computer Aided Design (TCAD) simulation:1||Technology ComputerAided Design (TCAD) simulation:1||Technology computeraided design (TCAD):1||Total ionizing dose (TID):1||Transistors:1||Tunneling:1||VSDRAM:1||Voltage measurement:1||Wide bandgap:1||Writing:1||XGBoost:1||axial contact:1||bandgapengineered tunneling:1||bandgapengineered tunneling oxide:1||capacitive crosstalk:1||carbon:1||charge loss mechanism:1||contact:1||contact resistivity:1||cosmic ray:1||cosmic rays:1||defect:1||disturbance:1||dose rate:1||downcoupling phenomenon:1||dummy cell:1||erase cycling:1||fermilevel pinning:1||fieldeffect transistors:1||fin fieldeffecttransistor:1||floating body:1||gamma ray:1||germanide:1||hard error:1||hightemperature retention characteristic:1||implantation:1||interface trap:1||interference:1||linear energy transfer:1||local substrate implant (LSI):1||machine learning:1||metalinsulatorsemiconductor:1||nanosheet FET (NSFET):1||nanosheet fieldeffect transistor (NSFET):1||nanosheet fieldeffecttransistor:1||nanowire:1||nonlinear energy loss:1||nonvolatile memory (NVM):1||noncircular cell:1||operation:1||parasitic bipolar junction transistor:1||point defect:1||prediction:1||program/erase cycling:1||quantum confinement:1||quasionedimensional:1||radial contact:1||radiation:1||radiation effects:1||reliability:1||saddle fin:1||scattering model:1||simulation:1||single event effect:1||single event upset (SEU):1||singleevent upset (SEU):1||softerror:1||source/drain:1||spike:1||static random access memory (SRAM):1||statistical analysis:1||subthreshold swing:1||superjunction:1||surround gate transistor (SGT):1||technology computeraided design simulation:1||technology computeraided design simulation (TCAD):1||technology scaling:1||technologycomputeraided design (TCAD) simulation:1||temperature:1||temperature effect:1||thermal stability:1||threshold voltage distribution:1||threshold voltage variation:1||titanium:1||transient current trap spectroscopy:1||trap profiling:1||trapped charge:1||tunneling fieldeffect transistor (TFET):1||vertical:1||βGa<sub>2</sub>O<sub>3</sub> FET:1||3D vertical SONOS NAND:1||Annealing:1||Attenuation:1||Bandtoband tunneling (BTBT):1||Bulk oxide trap:1||Capacitors:1||Carrier number fluctuation:1||Charge loss mechanism:1||Cosmic ray:1||Crosstalk:1||DD:1||DDR4:1||DRAM chips:1||Degradation:1||Design automation:1||Displacement:1||Displacement defect (DD):1||Doping optimization:1||Dynamic random access memory (DRAM):1||Electric fields:1||Electron traps:1||Electrons:1||Epitaxial growth:1||Etching:1||Fermilevel pinning:1||Flash memories:1||

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