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Decomposition of Charge Loss Mechanisms in 3-D Nand Flash Memory: Impact of Cell Dimension via High-Temperature Long-Term Retention Characteristics

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dc.contributor.authorPark, Jounghun-
dc.contributor.authorYoon, Gilsang-
dc.contributor.authorGo, Donghyun-
dc.contributor.authorKim, Donghwi-
dc.contributor.authorSagong, Hyun Chul-
dc.contributor.authorKim, Jungsik-
dc.contributor.authorLee, Jeong-Soo-
dc.date.accessioned2024-12-03T05:00:45Z-
dc.date.available2024-12-03T05:00:45Z-
dc.date.issued2024-10-
dc.identifier.issn0018-9383-
dc.identifier.issn1557-9646-
dc.identifier.urihttps://scholarworks.gnu.ac.kr/handle/sw.gnu/74231-
dc.description.abstractDecompositions of charge loss mechanisms in 3-D NAND flash memory with two different cell structures have been performed using high-temperature retention characteristics. It calculates emission rates of trap-to-band tunneling (TB) and band-to-trap tunneling (BT) to determine the dominant tunneling mechanisms. The lateral migration (LM) component is separated into the LM of holes (LMH) and electrons (LME) using the technology-computer-aided design (TCAD) simulation. The thicker blocking layer could lead to decreased vertical charge loss, and the shorter spacer could enhance the LM components.-
dc.format.extent9-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleDecomposition of Charge Loss Mechanisms in 3-D Nand Flash Memory: Impact of Cell Dimension via High-Temperature Long-Term Retention Characteristics-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TED.2024.3449251-
dc.identifier.scopusid2-s2.0-85205291263-
dc.identifier.wosid001308149400001-
dc.identifier.bibliographicCitationIEEE Transactions on Electron Devices, v.71, no.10, pp 6040 - 6048-
dc.citation.titleIEEE Transactions on Electron Devices-
dc.citation.volume71-
dc.citation.number10-
dc.citation.startPage6040-
dc.citation.endPage6048-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusLATERAL MIGRATION-
dc.subject.keywordPlusOPERATION-
dc.subject.keywordPlusMODEL-
dc.subject.keywordPlusSIMULATION-
dc.subject.keywordPlusDEVICES-
dc.subject.keywordAuthorTunneling-
dc.subject.keywordAuthorLogic gates-
dc.subject.keywordAuthorFlash memories-
dc.subject.keywordAuthorAttenuation-
dc.subject.keywordAuthorElectron traps-
dc.subject.keywordAuthorElectrons-
dc.subject.keywordAuthorVoltage measurement-
dc.subject.keywordAuthor3-D NAND flash memory-
dc.subject.keywordAuthorcharge loss mechanism-
dc.subject.keywordAuthorhigh-temperature retention characteristic-
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