4H-SiC와 산화막 계면에 대한 혼합된 일산화질소 가스를 이용한 산화 후속 열처리 효과Effect of High-Temperature Post-Oxidation Annealing in Diluted Nitric Oxide Gas on the SiO2/4H-SiC Interface
- Other Titles
- Effect of High-Temperature Post-Oxidation Annealing in Diluted Nitric Oxide Gas on the SiO2/4H-SiC Interface
- Authors
- 김인규; 문정현
- Issue Date
- Jan-2024
- Publisher
- 한국전기전자재료학회
- Keywords
- 4H-SiC; MOSFET; Dit; NO; POA; Oxidation; Nitridation
- Citation
- 전기전자재료학회논문지, v.37, no.1, pp 101 - 105
- Pages
- 5
- Indexed
- KCI
- Journal Title
- 전기전자재료학회논문지
- Volume
- 37
- Number
- 1
- Start Page
- 101
- End Page
- 105
- URI
- https://scholarworks.gnu.ac.kr/handle/sw.gnu/69312
- ISSN
- 1226-7945
2288-3258
- Abstract
- 4H-SiC power metal-oxide-semiconductor field effect transistors (MOSFETs) have been developed to achieve lower specific-on-resistance (Ron,sp), and the gate oxides have been thermally grown. The poor channel mobility resulting from the high interface trap density (Dit) at the SiO2/4H-SiC interface significantly affects the higher switching loss of the power device. Therefore, the development of novel fabrication processes to enhance the quality of the SiO2/4H-SiC interface is required. In this paper, NO post-oxidation annealing (POA) by using the conditions of N2 diluted NO at a high temperature (1,300℃) is proposed to reduce the high interface trap density resulting from thermal oxidation. The NO POA is carried out in various NO ambient (0, 10, 50, and 100% NO mixed with 100, 90, 50, and 0% of high purity N2 gas to achieve the optimized condition while maintaining a high temperature (1,300℃). To confirm the optimized condition of the NO POA, measuring capacitance-voltage (C-V) and current-voltage (I-V), and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) are employed. It is confirmed that the POA condition of 50% NO at 1,300℃ facilitates the equilibrium state of both the oxidation and nitridation at the SiO2/4H-SiC interface, thereby reducing the Dit.
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