Minimization of Abnormal Output Voltage Rising for LLC Resonant Converter at Very Light Load
- Kim, Chong-Eun
- Issue Date
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Abnormal output voltage rising; gallium nitride field-effect transistor (GaN FET); LLC resonant converter; silicon field-effect transistor (Si FET); very light load
- IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, v.67, no.12, pp.10295 - 10303
- Journal Title
- IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
- Start Page
- End Page
- An LLC resonant converter is a very attractive topology for high efficiency and high power density applications, thanks to zero-voltage switching of primary switches and zero-current switching of secondary rectifiers as well as low-voltage stress of the overall components. Its critical drawback is the unintended increase of output voltage beyond the regulation limit at very light load, in spite of much higher switching frequency for low input-to-output voltage gain. To suppress output voltage within the regulation range at very light load, the external capacitor attached across drain-source of primary switches is investigated and the optimal capacitance is designed in this article. Its validity is verified experimentally with the implemented 240-W prototype for flat-panel display application.
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