A 310-nA Quiescent Current 3-fs-FoM Fully Integrated Capacitorless Time-Domain LDO With Event-Driven Charge Pump and Feedforward Transient Enhancement
- Zhao, Jianming; Gao, Yuan; Zhang, Tan-Tan; Son, Hyunwoo; Heng, Chun-Huat
- Issue Date
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Charge pump (CP); frequency comparator (FC); low-dropout regulator (LDO); time-domain LDO
- IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.10, pp.2924 - 2933
- Journal Title
- IEEE JOURNAL OF SOLID-STATE CIRCUITS
- Start Page
- End Page
- In this article, a fully integrated capacitorless low-dropout regulator (LDO) is presented for Internet-of-Things (IoT) edge sensor application. To achieve sub-1-V operation and fast transient response with low quiescent current, the conventional operational transconductance amplifier (OTA)-based error amplifier (EA) is replaced with oscillator-based voltage-to-time converter and time-domain signal processing, including time-domain edge-based frequency comparator (FC) and event-driven voltage mode charge pump (CP). Compared with the conventional phase frequency detector (PFD), the proposed clock-edge-based FC achieved more than six times power reduction. Event-driven CP is adopted to drive analog power transistor and the transient response is enhanced by feedforward capacitor C-FD and coarse-fine CP control. To further reduce the power consumption, multi-voltage domain and clock frequency optimization are implemented. A prototype chip is fabricated in a standard 65-nm CMOS process. The design only consumes 310-nA quiescent current while achieving 0.5-1.2-V input range, 1.0 x 10(6) load dynamic range, and 3-fs figure of merit (FoM).
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- 공과대학 > 전자공학과 > Journal Articles
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