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Next high performance and low power flash memory package structure

Authors
Lee, Jung-Hoon
Issue Date
Jul-2007
Publisher
SCIENCE PRESS
Keywords
flash memory; NAND-type; NOR-type; memory localities; buffer or cache memory
Citation
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, v.22, no.4, pp 515 - 520
Pages
6
Indexed
SCIE
SCOPUS
Journal Title
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
Volume
22
Number
4
Start Page
515
End Page
520
URI
https://scholarworks.gnu.ac.kr/handle/sw.gnu/28351
DOI
10.1007/s11390-007-9068-9
ISSN
1000-9000
1860-4749
Abstract
In general, NAND flash memory has advantages in low power consumption, storage capacity, and fast erase/write performance in contrast to NOR flash. But, main drawback of the NAND flash memory is the slow access time for random read operations. Therefore, we proposed the new NAND flash memory package for overcoming this major drawback. We present a high performance and low power NAND flash memory system with a dual cache memory. The proposed NAND flash package consists of two parts, i.e., an NAND flash memory module, and a dual cache module. The new NAND flash memory system can achieve dramatically higher performance and lower power consumption compared with any conventional NAND-type flash memory module. Our results show that the proposed system can reduce about 78% of write operations into the flash memory cell and about 70% of read operations from the flash memory cell by using only additional 3KB cache space. This value represents high potential to achieve low power consumption and high performance gain.
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Lee, Jung Hoon
IT공과대학 (제어로봇공학과)
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