Ultra-energy-efficient analog-to-digital converters based on single-electron transistor/CMOS hybrid technology for biomedical applications
- Authors
- Lee, Jieun; Choi, Changmin; Park, Sungwook; Chung, In-Young; Kim, Chang-Joon; Park, Byung-Gook; Kim, Dong Myong; Kim, Dae Hwan
- Issue Date
- 2-Nov-2009
- Publisher
- IOP PUBLISHING LTD
- Citation
- SEMICONDUCTOR SCIENCE AND TECHNOLOGY, v.24, no.11
- Indexed
- SCIE
SCOPUS
- Journal Title
- SEMICONDUCTOR SCIENCE AND TECHNOLOGY
- Volume
- 24
- Number
- 11
- URI
- https://scholarworks.gnu.ac.kr/handle/sw.gnu/26108
- DOI
- 10.1088/0268-1242/24/11/115007
- ISSN
- 0268-1242
1361-6641
- Abstract
- Ultra-energy-efficient analog-to-digital converters (ADCs) based on single-electron transistor (SET)/complementary metal-oxide-semiconductor (CMOS) hybrid technology are proposed as a solution to sense and process biomedical signals. Our results show the energy efficiency of 0.82 pJ/state, which is lower than that in previously reported energy-efficient ADCs. The performance and dissipated power of proposed ADCs are estimated and compared with those of CMOS ADCs by using Lee's SPICE model including non-ideal effects of the experimental data. While the proposed ADC shows an operating power lower by two orders of magnitude than that of the CMOS flash-type ADC, the number of required transistors is about 10% of that in the CMOS flash-type ADC. The peak-to-valley current ratio in Coulomb oscillation of SETs used in the circuit implementation has the range of 1.15-1.5, which is consistent with the experimental result of top-down approached Si-based SETs at T = 77-100 K. From the perspective of the immunity to the gate capacitance C-cg mismatch and the background charge Q(0) noise, it is shown that the criteria of SET/CMOS hybrid ADCs are Delta C-cg <= 0.02 x C-cg (with C-cg = 0.24 aF) and Delta Q(0) <= 0.23q, respectively.
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