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A dc SSCB with range-limited parallel operation switches and a snubber circuit utilizing inverse current injectionopen access

Authors
Jo, Jae-SeongKim, Sun-PilLee, Sang-HyeokSong, Sung-GeunKang, Feel-Soon
Issue Date
Jun-2025
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
dc circuit breaker (DCCB); inverse current injection; metal oxide varistor (MOV); silicon carbide (SiC); snubber circuit; solid-state circuit breaker (SSCB); surge voltage
Citation
IEEE Access, v.13, pp 109701 - 109712
Pages
12
Indexed
SCIE
SCOPUS
Journal Title
IEEE Access
Volume
13
Start Page
109701
End Page
109712
URI
https://scholarworks.gnu.ac.kr/handle/sw.gnu/79101
DOI
10.1109/ACCESS.2025.3581596
ISSN
2169-3536
2169-3536
Abstract
This paper proposes a bidirectional snubber circuit with an inverse current injection to effectively suppress the surge voltage generated when a solid-state circuit breaker (SSCB) switch is turned off. It generates inverse current using an LC resonant circuit employing thyristors and suppresses the surge voltage by forcing the fault current to be zero when the SSCB switch is turned off. The capacitor absorbs the energy stored in the line inductance on the power source and load sides, thereby preventing voltage increases. In addition, the SSCB switches are structured in parallel so that only the SiC MOSFET with low conduction loss is turned on during normal operation. When the fault current increases and reaches a specific current threshold, the Si MOSFET is driven in parallel until reaching the breaking current value. This solves the price increase problem due to the SiC switch's current rating. The operational mode is described in detail with theoretical analysis, and the validity is verified through simulation and scaled-down experiments. The surge voltage suppression performance of the proposed snubber is evaluated by comparing it with the conventional RCD snubber and MOV-based snubber, and the surge voltage occurrence due to the inverse current injection timing mismatch is analyzed to present the range of allowable delay time. Finally, the cost model analysis evaluates the economic feasibility of the proposed snubber applying the parallel switch structure. © 2013 IEEE.
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