Back-Gate Bias-Controllable Subthreshold Slope of Junctionless Transistors

Abstract

Junctionless transistors (JLTs) are one of the next-generation logic transistors for sub-3-nm technology nodes with several advantages, including very simple structure, no p-n junctions at source and drain, and bulk conduction-based operation. In this work, back-gate voltage (V-gb) influenced subthreshold conduction mechanism of JLTs was investigated in detail. The subthreshold swing (SS) in JLTs was clearly improved with applying a negative V-gb, since the effective channel thickness of JLT was controlled by V-gb. The experimental results were verified by analytical model equations and numerical simulation. Those results provide a key information for developing low-power and energy-efficient applications with JLTs.