A D-Band Wideband Low-Noise Amplifier Adopting Pseudo-Simultaneous Noise and Input Matched Dual-Peak Gmax-Core
- Authors
- Lee, Hokeun; Yun, Byeonghun; Jeon, Hyoryeong; Keum, Wooyong; Lee, Sang-Gug; Choi, Kyung-Sik
- Issue Date
- May-2024
- Publisher
- Institute of Electrical and Electronics Engineers
- Keywords
- Amplifier; CMOS; dual-peak (DP) G(max)-core; G(max); low-noise amplifier (LNA); noise matching; sub-THz
- Citation
- IEEE Transactions on Microwave Theory and Techniques, v.72, no.5, pp 3260 - 3273
- Pages
- 14
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE Transactions on Microwave Theory and Techniques
- Volume
- 72
- Number
- 5
- Start Page
- 3260
- End Page
- 3273
- URI
- https://scholarworks.gnu.ac.kr/handle/sw.gnu/77434
- DOI
- 10.1109/TMTT.2023.3322838
- ISSN
- 0018-9480
1557-9670
- Abstract
- This article presents a high-gain and wide band D-band low-noise amplifier (LNA) adopting a proposed wideband pseudo-simultaneous noise-and input-matched (p-SNIM) dual-peak (DP) maximum achievable gain (G(ma)x)-core. For a transmission line (TL)-based DP G(max)-core, the p-SNIM condition is satisfied by adjusting the stability factor (K-f) without requiring additional components. Comprehensive analysis of the DP Gmax-core is performed to investigate the unique behaviors of input admittance for simultaneous conjugate matching (Y-in(*)) and optimal admittance for minimum noise figure (NF) (Y-nopt) as a function of K-f, which is fully exploited to implement the wideband p-SNIM DP G(max)-core. Moreover, we present the design procedure of a proposed dual-frequency inter-stage matching network that enables the wideband multistage LNA implementation. Implemented in a 40-nm CMOS technology, the D-band three-stage LNA achieves a peak power gain of 16.3 dB, a 3-dB bandwidth of 24 GHz, and a minimum NF of 4.9 dB while dissipating only 16.1 mW.
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