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A D-Band Wideband Low-Noise Amplifier Adopting Pseudo-Simultaneous Noise and Input Matched Dual-Peak Gmax-Core

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dc.contributor.authorLee, Hokeun-
dc.contributor.authorYun, Byeonghun-
dc.contributor.authorJeon, Hyoryeong-
dc.contributor.authorKeum, Wooyong-
dc.contributor.authorLee, Sang-Gug-
dc.contributor.authorChoi, Kyung-Sik-
dc.date.accessioned2025-03-19T01:00:11Z-
dc.date.available2025-03-19T01:00:11Z-
dc.date.issued2024-05-
dc.identifier.issn0018-9480-
dc.identifier.issn1557-9670-
dc.identifier.urihttps://scholarworks.gnu.ac.kr/handle/sw.gnu/77434-
dc.description.abstractThis article presents a high-gain and wide band D-band low-noise amplifier (LNA) adopting a proposed wideband pseudo-simultaneous noise-and input-matched (p-SNIM) dual-peak (DP) maximum achievable gain (G(ma)x)-core. For a transmission line (TL)-based DP G(max)-core, the p-SNIM condition is satisfied by adjusting the stability factor (K-f) without requiring additional components. Comprehensive analysis of the DP Gmax-core is performed to investigate the unique behaviors of input admittance for simultaneous conjugate matching (Y-in(*)) and optimal admittance for minimum noise figure (NF) (Y-nopt) as a function of K-f, which is fully exploited to implement the wideband p-SNIM DP G(max)-core. Moreover, we present the design procedure of a proposed dual-frequency inter-stage matching network that enables the wideband multistage LNA implementation. Implemented in a 40-nm CMOS technology, the D-band three-stage LNA achieves a peak power gain of 16.3 dB, a 3-dB bandwidth of 24 GHz, and a minimum NF of 4.9 dB while dissipating only 16.1 mW.-
dc.format.extent14-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleA D-Band Wideband Low-Noise Amplifier Adopting Pseudo-Simultaneous Noise and Input Matched Dual-Peak Gmax-Core-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TMTT.2023.3322838-
dc.identifier.scopusid2-s2.0-85174814844-
dc.identifier.wosid001090741500003-
dc.identifier.bibliographicCitationIEEE Transactions on Microwave Theory and Techniques, v.72, no.5, pp 3260 - 3273-
dc.citation.titleIEEE Transactions on Microwave Theory and Techniques-
dc.citation.volume72-
dc.citation.number5-
dc.citation.startPage3260-
dc.citation.endPage3273-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusHIGH-GAIN-
dc.subject.keywordPlusCMOS AMPLIFIER-
dc.subject.keywordPlus65-NM CMOS-
dc.subject.keywordPlusDESIGN-
dc.subject.keywordPlusFUTURE-
dc.subject.keywordAuthorAmplifier-
dc.subject.keywordAuthorCMOS-
dc.subject.keywordAuthordual-peak (DP) G(max)-core-
dc.subject.keywordAuthorG(max)-
dc.subject.keywordAuthorlow-noise amplifier (LNA)-
dc.subject.keywordAuthornoise matching-
dc.subject.keywordAuthorsub-THz-
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