Cited 1 time in
Electrically Tunable Ideality Factor and Series Resistance of Gate-Controlled Graphene/Pentacene Schottky Junctions
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Tae Yoon | - |
| dc.contributor.author | Kim, Yoon-jeong | - |
| dc.contributor.author | Ahn, Seokhoon | - |
| dc.contributor.author | Jeon, Dae-Young | - |
| dc.date.accessioned | 2024-05-29T01:00:21Z | - |
| dc.date.available | 2024-05-29T01:00:21Z | - |
| dc.date.issued | 2024-05 | - |
| dc.identifier.issn | 2168-6734 | - |
| dc.identifier.uri | https://scholarworks.gnu.ac.kr/handle/sw.gnu/70648 | - |
| dc.description.abstract | Gate-tunable Schottky barrier diodes find many applications in logic transistors, photodiodes, and sensors. In this work, the electrical properties of Schottky barrier diodes with graphene/pentacene junctions and additional gates were investigated in detail. The results of modeling equations that considered the ideality factor, series resistance, and effective barrier-height according to the gate bias (Vg) were in good agreement with the experimental results. In addition, the dominant conduction mechanism when the effective barrier-height was controlled by Vg is discussed from the perspective of the temperature-dependent currents in Schottky barrier diodes. This work provides critical information that aids our understanding of gated Schottky diodes with graphene/pentacene junctions, increasing the possible practical applications thereof. Authors | - |
| dc.format.extent | 1 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | Electrically Tunable Ideality Factor and Series Resistance of Gate-Controlled Graphene/Pentacene Schottky Junctions | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/JEDS.2024.3397014 | - |
| dc.identifier.scopusid | 2-s2.0-85193034307 | - |
| dc.identifier.wosid | 001229647400001 | - |
| dc.identifier.bibliographicCitation | IEEE Journal of the Electron Devices Society, v.12, pp 1 - 1 | - |
| dc.citation.title | IEEE Journal of the Electron Devices Society | - |
| dc.citation.volume | 12 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.endPage | 1 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | Y | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordPlus | THIN-FILM TRANSISTORS | - |
| dc.subject.keywordPlus | BARRISTOR | - |
| dc.subject.keywordPlus | CARBON | - |
| dc.subject.keywordAuthor | effective barrier-height | - |
| dc.subject.keywordAuthor | Gate-tunable Schottky barrier diodes | - |
| dc.subject.keywordAuthor | Graphene | - |
| dc.subject.keywordAuthor | graphene/pentacene junction | - |
| dc.subject.keywordAuthor | Heterojunctions | - |
| dc.subject.keywordAuthor | ideality factor | - |
| dc.subject.keywordAuthor | Logic gates | - |
| dc.subject.keywordAuthor | modeling | - |
| dc.subject.keywordAuthor | Pentacene | - |
| dc.subject.keywordAuthor | Resistance | - |
| dc.subject.keywordAuthor | Schottky barriers | - |
| dc.subject.keywordAuthor | Schottky diodes | - |
| dc.subject.keywordAuthor | series resistance | - |
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