SONOS 비휘발성 기억소자의 향상된 프로그램/소거 반복 특성

Abstract

In this study, a new programming method to minimize the generation of Si-SiO2 interface traps of SONOS nonvolatile memory device as a function of number of program/erase cycles was proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim(MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are left open. Also, the asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of SONOS devices because electrical stress applied to the Si-SiO2 interface is reduced due to short program time.