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고성능 저전력 하이브리드 L2 캐시 메모리를 위한 연관사상 집합 관리
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 정보성 | - |
| dc.contributor.author | 이정훈 | - |
| dc.date.accessioned | 2022-12-26T17:48:15Z | - |
| dc.date.available | 2022-12-26T17:48:15Z | - |
| dc.date.issued | 2018 | - |
| dc.identifier.issn | 1975-5066 | - |
| dc.identifier.uri | https://scholarworks.gnu.ac.kr/handle/sw.gnu/12716 | - |
| dc.description.abstract | STT-RAM is attracting as a next generation Non-volatile memory for replacing cache memory with low leakage energy, high integration and memory access performance similar to SRAM. However, there is problem of write operations as the other Non_volatile memory. Hybrid cache memory using SRAM and STT-RAM is attracting attention as a cache memory structure with lowe power consumption. Despite this, reducing the leakage energy consumption by the STT-RAM is still lacking access to the Dynamic energy. In this paper, we proposed as energy management method such as a way-selection approach for hybrid L2 cache fo SRAM and STT-RAM and memory selection method of write/read operation. According to the simulation results, the proposed hybrid cache memory reduced the average energy consumption by 40% on SPEC CPU 2006, compared with SRAM cache memory. | - |
| dc.format.extent | 7 | - |
| dc.language | 한국어 | - |
| dc.language.iso | KOR | - |
| dc.publisher | 대한임베디드공학회 | - |
| dc.title | 고성능 저전력 하이브리드 L2 캐시 메모리를 위한 연관사상 집합 관리 | - |
| dc.title.alternative | Way-set Associative Managementfor Low Power Hybrid L2 Cache Memory | - |
| dc.type | Article | - |
| dc.publisher.location | 대한민국 | - |
| dc.identifier.doi | 10.14372/IEMEK.2018.13.3.125 | - |
| dc.identifier.bibliographicCitation | 대한임베디드공학회논문지, v.13, no.3, pp 125 - 131 | - |
| dc.citation.title | 대한임베디드공학회논문지 | - |
| dc.citation.volume | 13 | - |
| dc.citation.number | 3 | - |
| dc.citation.startPage | 125 | - |
| dc.citation.endPage | 131 | - |
| dc.identifier.kciid | ART002362459 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | kci | - |
| dc.subject.keywordAuthor | Hybrid memory | - |
| dc.subject.keywordAuthor | Way-set associative | - |
| dc.subject.keywordAuthor | L2_cache | - |
| dc.subject.keywordAuthor | Low-power | - |
| dc.subject.keywordAuthor | Memory characteristics | - |
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