CSL-NOR형 SONOS 플래시 메모리의 멀티비트 적용에 관한 연구

Investigation for Multi-bit per Cell on the CSL-NOR Type SONOS Flash Memories

초록

NOR type flash 32 x 32 array are fabricated by using the typical 0.35 ㎛ CMOS process. The structure of array is the NOR type with common source line. In this paper, optimized program and erase voltage conditions are presented to realize multi-bit per cell at the CSL-NOR array. These are considered selectivity of selected bit and disturbances of unselected bits. Retention characteristics of locally trapped-charges in the nitride layer are investigated. The lateral diffusion and vertical detrapping to the tunneling oxide of locally trapped charges as a function of retention time are investigated by using the charge pumping method. The results are directly shown by change of the trapped-charges quantities.

키워드

SONOS; NOR type flash memory; Common source line; Multi-bit; Charge pumping method; SONOS; NOR type flash memory; Common source line; Multi-bit; Charge pumping method
제목
CSL-NOR형 SONOS 플래시 메모리의 멀티비트 적용에 관한 연구
제목 (타언어)
Investigation for Multi-bit per Cell on the CSL-NOR Type SONOS Flash Memories
저자
김주연; 김병철; 서광열; 안호명; 이명식
발행일
2005
저널명
전기전자재료학회논문지
권
18
호
3
페이지
193 ~ 198