Wafer-scale and environmentally-friendly deposition methodology for extremely uniform, high-performance transistor arrays with an ultra-low amount of polymer semiconductors

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초록

We report on a new class of microliter-scale solution processes for fabricating highly uniform and largearea transistor arrays with extremely low consumption of semiconducting polymers. These processes are accomplished by applying a vertical phase separation of polymers with an environmentally benign solvent, a random copolymerization strategy between two highly conductive repeating units, and a meniscus-dragging deposition technique. The successful realization of these three processes, as confirmed by the structural and morphological in-depth characterizations, has enabled the fabrication of high-performance polymeric field-effect transistors that were uniformly distributed, without a single failure, on a 4 inch wafer using only 40 mu g of semiconducting polymers. The resulting transistor arrays showed an average mobility of 0.28 cm(2) V-1 s(-1), with a low standard deviation of 0.04, as well as ultra-uniform near-zero threshold voltages. Our simple strategy shows great promise for fabricating large-scale organic electronic devices in the future using a truly low-cost process.

키워드

FIELD-EFFECT TRANSISTORSHIGH-MOBILITYLARGE-AREACHARGE-TRANSPORTDISORDER
제목
Wafer-scale and environmentally-friendly deposition methodology for extremely uniform, high-performance transistor arrays with an ultra-low amount of polymer semiconductors
저자
Cho, JangwhanKo, YeongunCheon, Kwang HeeYun, Hui-JunLee, Han-KooKwon, Soon-KiKim, Yun-HiChang, Suk TaiChung, Dae Sung
DOI
10.1039/c4tc02674h
발행일
2015-03
유형
Article
저널명
Journal of Materials Chemistry C
3
12
페이지
2817 ~ 2822