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Effect of Back-Gate Bias-Induced Interfaces on the Zero-Temperature-Coefficient in Fully Depleted SOI Transistors
- Jeon, Dae-Young;
- Kim, Yeonsu;
- Casse, Mikael;
- Nicoletti, Sergio;
- Kim, Gyu-Tae
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0초록
This study investigates the impact of back-gate bias-induced interfaces on the zero-temperature-coefficient (ZTC) point in fully depleted SOI transistors, revealing its fundamental mechanism through mutual compensation between threshold voltage (V-th) shifts and interface-affected carrier mobility. Experimental results demonstrate that the ZTC point systematically tracks V-th modulation and interface effects with varying Vgb. Notably, positive V-gb significantly narrows the gap between ZTC and V-th, as the dominant conduction channel shifts toward the high-quality bottom interface with minimal interface states influence.
키워드
Temperature; Silicon-on-insulator; Back; Transistors; Electrons; Scattering; Transconductance; Fully depleted SOI transistors; zero-temperature-coefficient (ZTC); back-gate bias; ZTC modulation; interface states
- 제목
- Effect of Back-Gate Bias-Induced Interfaces on the Zero-Temperature-Coefficient in Fully Depleted SOI Transistors
- 저자
- Jeon, Dae-Young; Kim, Yeonsu; Casse, Mikael; Nicoletti, Sergio; Kim, Gyu-Tae
- 발행일
- 2026-08
- 유형
- Article
- 권
- 14
- 페이지
- 728 ~ 732
- 언어
- ENG
- 출판사
- Institute of Electrical and Electronics Engineers Inc.
- 발행국가
- 미국
- 분량
- 5 페이지
- ISSN
- P 2168-6734