Control mechanism for low power embedded TLB

Citations

SCOPUS

0

초록

This research proposes a new embedded translation look-aside buffer (TLB) structure that can reduce the power consumption effectively by using simple hardware control logics. The proposed TLB structure is constructed as two fully associative TLBs and one of the two TLBs is selectively accessed by the dynamic selection method. It is shown that on-chip power consumption of the proposed TLB can be reduced by around 42% comparing with the conventional fully associative TLBs with the same number of entries. ? 2011 Springer Science+Business Media B.V.

키워드

Low power designMemory hierarchyTemporal localityTranslation look-aside buffer (TLB)
제목
Control mechanism for low power embedded TLB
저자
Lee, J.-H.
DOI
10.1007/978-94-007-2598-0_50
발행일
2012
유형
Conference Paper
저널명
Lecture Notes in Electrical Engineering
107 LNEE
페이지
477 ~ 481