Surface morphology engineering of metal oxide-transition metal dichalcogenide heterojunction

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초록

A tremendous effort has been made to develop 2D materials-based FETs for electronic applications due to their atomically thin structures. Typically, the electrical performance of the device can vary with the surface roughness and thickness of the channel layer. Therefore, a two-step surface engineering process is demonstrated to tailor the surface roughness and thickness of MoSe2 multilayers involving exposure of O-2 plasma followed by dipping in (NH4)(2)S(aq) solution. The O-2 plasma treatment generated an amorphous MoOx layer to form a MoOx/MoSe2 heterojunction, and the (NH4)(2)S(aq) treatment tailored the surface roughness of the heterojunction. The ON/OFF current ratio of MoSe2 FET is about 1.1 x 10(5) and 5.7 x 10(4) for bare and chemically etched MoSe2, respectively. The surface roughness of the chemically treated MoSe2 is higher than that of the bare, 4.2 +/- 0.5 nm against 3.6 +/- 0.5 nm. Conversely, a 1-hour exposure of the multilayer MoOx/MoSe2 heterostructure with the (NH4)(2)S(aq) solution removed the amorphous oxide layer and scaled down the thickness of MoSe2 from similar to 92.2 nm to similar to 38.9 nm. The preliminary study shows that this simple two-step strategy can obtain a higher surface-area-to-volume ratio and thickness engineering with acceptable variation in electrical properties.

키워드

MoSe2; heterostructure; O-2 plasma; chemical etching; surface roughness; LAYER MOS2; LARGE-AREA; MONOLAYER; GROWTH; FILMS
제목
Surface morphology engineering of metal oxide-transition metal dichalcogenide heterojunction
저자
Oh, Chang-Hwan; Babu, Roshni Satheesh; Kim, Seung-Il; Lee, Dong-Park; Sim, Gyuhyeon; Lee, Do-Hyeon; Je, Yeonjin; Kim, Chan Hwi; Jeong, Woo Jin; Ryu, Gyeong Hee; Kim, Jun Young; Nam, Sang Yong; Lee, Jae Hyun; Park, Jun Hong
DOI
10.1080/21870764.2022.2117892
발행일
2022-10
유형
Article
저널명
Journal of Asian Ceramic Societies
권
10
호
4
페이지
722 ~ 730