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CAWBT: NVM-Based B plus Tree Index Structure Using Cache Line Sized Atomic Write
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Dokeun | - |
| dc.contributor.author | Lee, Seongjin | - |
| dc.contributor.author | Won, Youjip | - |
| dc.date.accessioned | 2022-12-26T14:17:08Z | - |
| dc.date.available | 2022-12-26T14:17:08Z | - |
| dc.date.issued | 2019-12 | - |
| dc.identifier.issn | 0916-8532 | - |
| dc.identifier.issn | 1745-1361 | - |
| dc.identifier.uri | https://scholarworks.gnu.ac.kr/handle/sw.gnu/8427 | - |
| dc.description.abstract | Indexing is one of the fields where the non-volatile memory (NVM) has the advantages of byte-addressable characteristics and fast read/write speed. The existing index structures for NVM have been developed based on the fact that the size of cache line and the atomicity guarantee unit of NVM are different and they tried to overcome the weakness of consistency from the difference. To overcome the weakness, an expensive flush operation is required which results in a lower performance than a basic B+tree index. Recent studies have shown that the I/O units of the NVM can be matched with the atomicity guarantee units under limited circumstances. In this paper, we propose a Cache line sized Atomic Write B+tree (CAWBT), which is a minimal B+tree structure that shows higher performance than a basic b+ tree and designed for NVM. CAWBT has almost same performance compared to basic B+tree without consistency guarantee and shows remarkable performance improvement compared to other B+tree indexes for NVM. | - |
| dc.format.extent | 10 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Oxford University Press | - |
| dc.title | CAWBT: NVM-Based B plus Tree Index Structure Using Cache Line Sized Atomic Write | - |
| dc.type | Article | - |
| dc.publisher.location | 일본 | - |
| dc.identifier.doi | 10.1587/transinf.2019EDP7034 | - |
| dc.identifier.scopusid | 2-s2.0-85076417736 | - |
| dc.identifier.wosid | 000499697000018 | - |
| dc.identifier.bibliographicCitation | IEICE Transactions on Information and Systems, v.E102D, no.12, pp 2441 - 2450 | - |
| dc.citation.title | IEICE Transactions on Information and Systems | - |
| dc.citation.volume | E102D | - |
| dc.citation.number | 12 | - |
| dc.citation.startPage | 2441 | - |
| dc.citation.endPage | 2450 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | Y | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Software Engineering | - |
| dc.subject.keywordAuthor | non-volatile memory | - |
| dc.subject.keywordAuthor | key-value store | - |
| dc.subject.keywordAuthor | index structure | - |
| dc.subject.keywordAuthor | B plus tree | - |
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