알기쉽게 풀어쓴 FPGA VerilogHDL 디지털 회로설계
Full metadata record
| DC Field |
Value |
Language |
| dc.contributor.author | 양영일 | - |
| dc.contributor.author | 류대우 | - |
| dc.date.accessioned | 2023-04-21T08:42:43Z | - |
| dc.date.available | 2023-04-21T08:42:43Z | - |
| dc.date.issued | 2018-02 | - |
| dc.identifier.isbn | 9791195524761 | - |
| dc.identifier.uri | https://scholarworks.gnu.ac.kr/handle/sw.gnu/35281 | - |
| dc.format.extent | 373 | - |
| dc.language | 한국어 | - |
| dc.language.iso | KOR | - |
| dc.publisher | (주)뉴티씨 | - |
| dc.title | 알기쉽게 풀어쓴 FPGA VerilogHDL 디지털 회로설계 | - |
| dc.type | Book | - |
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - 공과대학 > 반도체공학과 > Books & Book Chapters

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.